A dynamic random access memory (DRAM) cell typically includes a charge storage capacitor (or cell capacitor) coupled to an access device such as a Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET). The MOSFET charges or discharges the capacitor, thereby affecting a logical state defined by the stored charge. The operating conditions of DRAM, such as operating voltage, leakage rate, and refresh rate, typically require that a certain minimum charge be stored by the capacitor. In order to increase memory capacity, the packing density of storage cells must increase, however, each storage cell capacitor must maintain a required capacitance level for a respective memory cell area. Accordingly, it is becoming extremely difficult to produce a capacitor with a relatively high storage capacitance that will also fit within the available memory cell area.
Another category of miniature electronic devices includes single-electron components. With these devices, switching processes are executed with single electrons. These devices involve techniques for memory systems in silicon technology based on trapping of single electrons on silicon inclusions in the gate oxide of transistors and trapping of electrons at traps or point defects in the gate oxide. Additional techniques include trapping of electrons on the grains of polysilicon in thin film transistors and trapping of single electrons in potential minimum regions in an ultra-thin film of roughened silicon on insulator material. Most of these techniques, however, involve the tunneling of electrons through thin oxides, which in turn requires high electric fields in such oxides. Such high electric fields degrade the oxides and confer only a limited number of memory cycling times, typically on the order of 109 times. Other single-electron techniques involve the trapping of electrons on polysilicon grains formed in thin film devices. This process, however, is difficult to control since the roughening of the polysilicon to form the grains occurs randomly.